The invention lies in the semiconductor technology field. More specifically, the invention relates to a semiconductor construction for controlling a current flow. The semiconductor construction according to the invention comprises, in particular, an island region, which is at least partly buried in a first semiconductor region.
In order to supply an electrical load with a rated electric current, the load is usually connected to an electrical supply network via a switching device. During the switch-on operation and also in the case of a short circuit, an overcurrent occurs which lies significantly above the rated current. In order to protect the electrical load, the switching device connected between the load and the electrical network must be able to limit and also switch off the overcurrent. Current-limiting switches in the form of a semiconductor construction are known for this function.
U.S. Pat. No. 6,034,385 and international publication WO 00/16403 A1 disclose such a semiconductor construction, in which a current flow between a first and a second electrode is controlled. In particular, the current is switched on and off or limited to a maximum value. The active part of the semiconductor construction comprises a first semiconductor region of a predetermined conductivity type, in particular the n conductivity type. For current control, at least one lateral channel region is provided within the first semiconductor region. In this case, lateral is understood to mean a direction parallel to a surface of the first semiconductor region. By contrast, vertical denotes a direction running perpendicularly to the surface. The lateral channel region is bounded by at least one p-n junction, in particular by the depletion zone (zone with depletion of charge carriers and hence high electrical resistance; space charge zone) of the p-n junction, in the vertical direction. The vertical extent of the depletion zone can be set inter alia by a control voltage. The p-n junction is formed between the first semiconductor region and a buried p-conducting island region. The buried island region undertakes the shielding of the first electrode with respect to the high electric field in the reverse direction or in the switched-off state. In specific embodiments, the channel region can also be bounded by a further depletion zone in the vertical direction. The further depletion zone is brought about, by way of example, by a further p-n junction between a second p-conducting semiconductor region and the first n-conducting semiconductor region. Depending on the embodiment, a relatively high forward resistance can result in the case of the prior semiconductor construction. Moreover, for the exact setting of the lateral dimension of the channel region and also for the precise lateral positioning of the channel region within the semiconductor construction, the individual semiconductor regions have to be positioned very exactly relative to one another. This high alignment outlay is necessary in particular for the buried p-conducting island region and the second p-conducting semiconductor region.
A similar semiconductor construction is described in U.S. Pat. Nos. 5,895,939 and 5,963,807 and German patent application DE 196 29 088 A1. Consequently, this semiconductor construction also has a relatively high forward resistance, and it is again necessary to satisfy high requirements made of the alignment accuracy.
Furthermore, U.S. Pat. No. 5,543,637 discloses a semiconductor construction which comprises a first semiconductor region of a first conductivity type with a buried island region of a conductivity type opposite to the first, and also two electrodes and a control electrode. The respective depletion zones brought about by the control electrode and the buried island region again form a channel region in which a current flowing between the two electrodes is controlled. The control electrode is embodied either as a Schottky contact or as an MOS contact. 3C, 6H or 4H silicon carbide is used as semiconductor material. This semiconductor construction also has a relatively high forward resistance and requires a high precision in the alignment of the individual semiconductor regions.
It is accordingly an object of the invention to provide a semiconductor construction with a buried island and a contact region which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which specifies a semiconductor construction for current control which has a low forward resistance. At the same time, the intention is to improve the alignment outlay required for the local definition of the channel region by comparison with the prior art.
With the foregoing and other objects in view there is provided, in accordance with the invention, a semiconductor construction for controlling a current, comprising:
a first semiconductor region of a first conductivity type having a first surface;
an island region of a second conductivity type, opposite the first conductivity type, at least partly buried within the first semiconductor region and having a second surface facing the first surface;
a contact region of the first conductivity type disposed at the second surface within the island region; and
a lateral channel region formed between the first surface and the second surface and forming a part of the first semiconductor region;
the channel region forming a part of a current path from or to the contact region;
at least one depletion zone for influencing a current within the channel region; and
the channel region having one lateral edge reaching to the contact region.
Expressed in different terms, the novel semiconductor construction is a configuration for controlling a current and it is formed of the following elements:
a) a first semiconductor region of a first conductivity type (n or p) having a first surface,
b) an island region of a second conductivity type (p or n), opposite to the first conductivity type, which is at least partly buried within the first semiconductor region and has a second surface facing the first surface,
c) a contact region of the first conductivity type (n or p), which is arranged at the second surface within the island region, and
d) a lateral channel region formed between first and second surfaces as part of the first semiconductor region,
d1) which channel region is part of a current path from or to the contact region,
d2) within which channel region the current can be influenced by at least one depletion zone, and
d3) one lateral edge of which channel region reaches as far as the contact region.
In this case, the invention is based on the insight that the relatively high forward resistance that can be observed in the case of the known semiconductor construction is brought about in particular by a so-called prechannel. This prechannel is situated between the actual lateral channel region and the contact region within the first semiconductor region. Since the first semiconductor region usually has to take up a large part of the voltage arising in the reverse direction or in the switched-off state, it normally has a relatively low doping rate. However, this results in a comparatively low electrical conductivity. The electric current carried in the forward state therefore experiences an electrical resistance that is all the greater, the longer its current path through the first semiconductor region. By virtue of the arrangement of the contact region within the buried island region, an electric current flowing out of the contact region directly enters into the lateral channel region which is critical for the current control. A prechannel, which is insignificant for the actual current control and would otherwise lead to an undesirable increase in the forward resistance, does not arise in the case of this particular arrangement of the contact region. Thus, the overall resultant forward resistance is significantly less than that of the known semiconductor construction.
Both in terms of lateral dimensioning and in terms of its lateral position within the semiconductor construction, the lateral channel region is essentially determined by the position of the contact region within the buried island region. It has been recognized that the structuring method disclosed in international publication WO 99/07011 A1, that was originally designed for a MOSFET, can also advantageously be used for the definition of the lateral channel region of the semiconductor construction. In this case, what has a favorable effect is, in particular, the fact that the channel region and the island region, which determine the dimensioning and the position of the lateral channel region, are arranged in the same epitaxial layer. By contrast, in the case of the known semiconductor construction, the structures defining the lateral channel region are situated in at least two different epitaxial layers. This means that, between two lithography steps required for the structure definition, an epitaxial growth, in particular, can take place, thereby making it considerably more difficult to align the lithography steps with high accuracy in relation to one another. By virtue of the contact region being embedded in the island region, the structuring that is essential for the lateral channel region in the semiconductor construction takes place within a single epitaxial layer and thus both with a lower outlay and with a very high precision.
In accordance with an advantageous embodiment, the island region and the contact region are short-circuited by means of a first electrode. To that end, a contact hole which extends proceeding from the first surface at least as far as the second surface is provided in the first semiconductor region.
It is also possible for there to be a plurality of contact holes present, in order to ensure a more reliable contact-connection. In this case, the at least one contact hole is positioned in such a way that a part for a contact-connection is in each case accessible both from the island region and from the contact region. The first electrode provided in the at least one contact hole effects ohmic contact-connection of the two regions. By virtue of the electrically conductive connection (=short circuit) between the contact region and the island region, a capacitance that otherwise forms between these two regions is practically eliminated or at least reduced to a very great extent. As a result, the semiconductor construction can be used as a very fast switch.
In accordance with an additional feature of the invention, the island region has an elevation in the region adjoining the lateral channel region. Said elevation can be achieved for example by a short deep etching of the contact region and also of the island region in the region not adjoining the lateral channel region. The operational reliability of the semiconductor construction increases by virtue of the fact that the second surface is set back in the region of the contact region relative to that region of the island region which adjoins the channel region. The lateral channel region is then reliably pinched off by the participating depletion zones before a possible punch-through to the contact region can occur.
In accordance with another feature of the invention, the lateral channel region is arranged between a first and a second depletion zone in the vertical direction. The first depletion zone is situated on a side of the lateral channel region which faces the first surface and the second depletion zone is situated on that side of the lateral channel region which faces the island region. The second depletion zone is formed by a p-n junction between the first semiconductor region and the buried island region. Depending on the operating state of the semiconductor construction, the two depletion zones bound the lateral channel region or pinch it off completely. A lateral channel region designed in this way yields a semiconductor construction that is highly resistant to a breakdown.
Moreover, preference is attached to an embodiment in which the first depletion zone and the contact region overlap in a fictitious projectionxe2x80x94performed perpendicularly to the first or second surfacexe2x80x94into a common plane at their lateral edges. The lateral channel region then reaches directly up to the contact region embedded in the island region. A prechannel, which cannot be controlled by the depletion zones and would increase the forward resistance, does not form in that case.
In one embodiment, the first depletion zone is that of a Schottky contact. In this case, the Schottky contact may, in particular, also be formed by means of the first electrode and a region of the first semiconductor region which is located at the first surface. The first electrode then extends over the upper edge of the contact hole as far as the relevant region of the first surface. However, the Schottky contact may also be formed by an additional control electrode, to which a control voltage can be applied, and that region of the first semiconductor region which is located at the first surface. In this case, the first electrode and the control electrode are electrically insulated from one another. The first semiconductor region may have, in the region of the Schottky contact, a suitable doping that deviates from the rest of the first semiconductor region.
In another embodiment, the lateral channel region is bounded or pinched off by at least one first depletion zone brought about by a MIS (Metal Isolator Semiconductor) contact, in particular by a MOS (Metal Oxide Semiconductor) contact. In this case, a MIS contact is understood to be a layer construction comprising an insulation layer and an overlying control electrode, said layer construction being arranged at the first surface of the semiconductor region. The insulation layer is preferably an oxide layer.
In a particularly advantageous refinement, the first depletion zone, which bounds the lateral channel region in the vertical direction, is the depletion zone of a p-n junction situated between the first semiconductor and a second semiconductor region. The second semiconductor region is arranged at the first surface within the first semiconductor region. It has the opposite conductivity type to the conductivity type of the first semiconductor region.
A first variant of the refinement with the second semiconductor region is distinguished by the fact that a charge storage effect is utilized in the second semiconductor region. This is achieved by electrical insulation of the second semiconductor region at the first surface with an insulation layer, preferably with an oxide layer. The charge storage in the second semiconductor region has the effect that after the onset of the pinch-off of the channel region in the presence of a specific operating voltage, the pinch-off initially persists even when the operating voltage decreases. As a result, an acceptable limiting current (reverse current) is essentially maintained over a predetermined limiting time (blocking time). This variant makes it possible to realize a passive current limiter in which the lateral channel region is normally open and is pinched off only by a voltage drop brought about by a large current.
In a second variant, the second semiconductor region is subjected to ohmic contact-connection to a control electrode. By applying a control voltage to said control electrode, it is possible to control the extent of the first depletion zone and thus the electrical resistance of the lateral channel region. In this second variant, the channel region can also already be pinched off in the voltage-free state (=normally off) and be opened, i.e. produced, only by application of a control voltage. This controllable semiconductor construction makes it possible to realize an active current limiter.
The first electrode and the control electrode can be electrically insulated from one another. On the other hand, it is also possible to effect ohmic contact-connection also of the second semiconductor region at the first surface by means of the first electrode, besides the contact region and the island region. The contact region is then also electrically short-circuited to the second semiconductor region. The first electrode and the control electrode form a common electrode in this case.
In an advantageous refinement, the semiconductor construction is composed partially or else completely of a semiconductor material having a band gap of at least 2 eV. A semiconductor material with such a high band gap is advantageous particularly if a charge storage effect is utilized. Examples of suitable semiconductor materials are diamond (diamant), gallium nitrite (GaN), indium phosphite (InP) or preferably silicon carbide (SiC). The above-mentioned semiconductor materials, in particular SiC, are very advantageous on account of the extremely low intrinsic charge carrier concentration (=charge carrier concentration without doping) and the very low on-state loss. The low intrinsic charge carrier concentration promotes charge storage. Moreover, the abovementioned semiconductor materials have a significantly higher breakdown strength compared with the xe2x80x9cuniversal semiconductorxe2x80x9d silicon, so that the semiconductor construction can be used at a higher voltage. The preferred semiconductor material is silicon carbide, in particular monocrystalline silicon carbide of the 3C or 4H or 6H or 15R polytype.
A favorable refinement is a refinement in which an additional p-n junction is provided between the first semiconductor region and a second electrode, which, in particular is arranged on a side of the first semiconductor region which is opposite to the first surface. By virtue of this additional p-n junction, the semiconductor construction can be operated at a higher (reverse) voltage.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a semiconductor construction with buried island region and contact region, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.